The present invention relates to a semiconductor memory device for storing data utilizing carrier trapping at the interface of double gate insulation films.
There are two conventional forms for writing data of "1" level and "0" level in an FET (field effect transistor) which is used as a nonvolatile memory element. In the first method, a voltage is applied between the gate electrode and the semiconductor substrate to cause a tunnel phenomenon. The carriers in the substrate are thus injected through the barrier and are trapped in the low energy layer. In the second method, a high voltage is applied between the source and drain to cause an avalanche phenomenon. The carriers in the substrate are thus injected through the barrier and are trapped in the low energy layer. In an FET for storing data utilizing the tunnel phenomenon, the carriers are mainly trapped at and in the vicinity of the interface of double insulating layers consisting of a silicon nitride film (Si.sub.3 N.sub.4) or an alumina film (Al.sub.2 O.sub.3), and a thin silicon dioxide film (SiO.sub.2).
In an FET for storing data utilizing the avalanche phenomenon, polycrystalline silicon as a floating gate embedded in the SiO.sub.2 film is used as the low energy layer for storing the carriers.
When a comparison is made between an FET utilizing the tunnel phenomenon and an FET utilizing the avalanche phenomenon, the FET utilizing the tunnel phenomenon is superior to the other since it provides greater ease in clearing the data and allows a higher packing density.
FIG. 1 presents characteristic curves showing the relation between the gate voltage VG and the threshold voltage Vth of an FET of conventional construction which utilizes the tunnel phenomenon.
Referring to FIG. 1, the curve "A" is the characteristic curve for MAOS (metal alumina oxide semiconductor) FET, and "B" is a characteristic curve for an MNOS (metal nitride oxide semiconductor) FET. In the MAOS FET, the double gate insulation films consist of an SiO.sub.2 film formed on the substrate and an alumina (Al.sub.2 O.sub.3) film formed on the SiO.sub.2 film. In the MNOS FET, the double gate insulating films consist of an SiO.sub.2 film formed on the substrate and a silicon nitride (Si.sub.3 N.sub.4) film formed on the SiO.sub.2 film.
As may be apparent from the characteristic curves of FIG. 1, a gate voltage of over about .+-.40 V must be applied in the case of the MAOS FET (curve A) and over +10 V and less than -20 V in the case of the MNOS FET (curve B) for varying the threshold voltage Vth. That is to say, the writing and clearing of the data cannot be effected unless a considerably high gate voltage is applied.
Thus, the conventional FET has suffered the problem that a considerably high gate voltage must be applied for writing and clearing the data.